Freescale HCS12 9S12 Datasheets

Freescale Semiconductor, Inc. provides the following datasheets for the 9S12 (HCS12) Microcontroller, the processor chip used on the PDQ Board Single Board Computer (SBC).

These following Freescale datasheets are provided to supplement the documentation on this website. You may find them useful when hardware/software interfacing to the microcontroller chip. The detailed specifications provide the timing information you may sometimes need when writing c language application programs. Most datasheets listed on this page may be downloaded as a single 6.8 MB zipped file,

All Freescale HCS12/9S12 datasheets

or you can choose among the following individual module descriptions to download.

MC9S12A512/DP512 Device Guide V01.25

The MC9S12A512/DP512 Device Guide covers the following topics:

Device Overview and Block Diagram
Pin and Signal Descriptions
System Clock
Interrupt Priority
Modes of Operation, and more.

The MC9S12DP512 Device Guide fully covers the MC9S12A512 version of the processor used in the PDQ products. For a brief introduction to the microcontroller used, see the following:

Overview of the MC9S12A512 microcontroller.

MCU and I/O SubSystem Datasheets

The following additional datasheets and manuals describe each of the I/O subsystems of the MC9S12A512/DP512 MCU which are useful when designing automation and control instruments:

Analog input

10-bit A/D (ATD_10B8C) Block User Guide

Digital I/O

Communications

Electrical specifications

Debugging

CPU and assembly coding

CPU (S12CPUV2) and Assembly Language Reference Manual (Instruction Set)¹⁾

Internal systems

Memory

Interrupts

Interrupt (INT) Module

Module Mapping Control (MMC) V4

The Module Mapping Control Guide shows you how to use the control registers for the HCS12 Microcontroller and how to configure the device's memory map.

I/O Pin Electrical Specifications

The Freescale application note, AN2434 Input/Output (I/O) Pin Drivers on HCS12 Family MCUs, provides detailed specifications for the processor's I/O pins.

Connecting Hardware to the 9S12 Processor

The Freescale application note, AN2727 Designing Hardware for the HCS12 D-Family, provides guidance for connecting to the processor's I/O pins.

Other 9S12 Datasheets

The PDQ Board's 9S12 processor, the MC9S12A512, does not support the Controller Area Network, CAN, automotive signaling protocols supported by other versions of the processor, such as the MC9S12DP512. Even so, as a service to those looking for descriptions of the protocol, the datasheets are provided here:

Another, souped-up version of the 9S12, the MC9S12XDP512, provides greater timer capabilities for automotive applications. As the user manual for its Enhanced Capture Time module provides some specifications that were neglected in the manual for the MC9S12DP512 version, it is provided here. Beware however that it is not always clear which specifications are shared by the two versions, and which apply only to the X-version of the processor.

ECT_16B8C Block User Guide V02.03 for the MC9S12XDP512

See also →

Notes:

This manual describes the features and operation of the core (central processing unit, or CPU, and development support functions) used in all HCS12 microcontrollers. Pre-coded C-language routines make it easy to access these features.

The BDLC module is a serial communication module which allows the user to send and receive messages across a Society of Automotive Engineers (SAE) J1850 serial communication network. The user’s software handles each transmitted or received message on a byte-by-byte basis, while the BDLC performs all of the network access, arbitration, message framing and error detection duties.

The Motorola Scalable Controller Area Network (MSCAN) definition is based on the MSCAN12 definition which is the specific implementation of the Motorola Scalable CAN concept targeted for the Motorola MC68HC12 Microcontroller Family.

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