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The C Programmer’s Guide to the QVGA Controller

Table of Contents

PART 1 GETTING STARTED

Introduction. How to Use This Manual

Chapter 1: Getting to Know Your QVGA

PART 2 PROGRAMMING THE QVGA CONTROLLER

Chapter 2: Your First Program

Chapter 3: The IDE: Writing, Compiling, Downloading and Debugging Programs

Chapter 4: Making Effective Use of Memory

Chapter 5: Programming the Graphical User Interface

Chapter 6: Real Time Programming

Chapter 7: Failure and Run-Time Error Recovery

PART 3 COMMUNICATIONS, MEASUREMENT, AND CONTROL

Chapter 8: Digital and Timer-Controlled I/O

Chapter 9: Data Acquisition Using the QVGA Controller

Chapter 10: Outputting Voltages with Digital to Analog Conversion

Chapter 11: Serial Communications

Chapter 12: The Battery-Backed Real Time Clock

PART 4: PUTTING IT ALL TOGETHER

Chapter 13: A Turnkeyed Application

PART 5: REFERENCE DATA

Appendix A: QVGA Electrical Specifications

Appendix B: Connector Pinouts

Appendix C: Physical Dimensions

Appendix D: Schematics (pdf)

Appendix A

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Appendix A: QVGA Electrical Specifications

General Specifications

CPU

  Motorola 68HC11F1 microcontroller with 16 MHz clock speed and 4 MHz bus speed.  Paged memory expands the processor’s address space to 8 Megabytes.

Timers

  3 or 4 input capture functions facilitate accurate detection of pulse edges and measurement of pulse widths with a resolution of 2ms.

  4 or 5 output compare functions make it easy to create complex waveforms and pulse-width modulated signals up to 20KHz at 50% CPU load.

  A pulse accumulator facilitates frequency measurement and pulse counting up to 2MHz.

Interrupts

  21 interrupts support the 68HC11’s on-chip subsystems.

Runtime Security

  A watchdog timer and clock monitor ensures orderly reset after an error.

Touchscreen/Display User Interface

  EL option: Bright amber-on-black, high contrast, all angle view TFEL electro-luminescent display.

  MONO option: High contrast CCFL white-on-blue monochrome LCD display with software controlled backlight and contrast.

  5.7" diagonal (3.5" x 4.6"), 320 x 240 pixel display.

  High resolution transparent analog touchscreen with software controlled beeper for audible feedback.  Custom antiglare, clear, and EMI touchscreens are also available.

Communications

  A hardware UART supports either RS232 or RS485 at up to 19.2 Kbaud.

  A second software UART implements RS232 at up to 4800 baud.

  A fast synchronous serial peripheral interface (SPI) provides communications at speeds up to 2 megabaud.

High Current Drivers

  Four open-drain MOSFET drivers can sink up to 150 mA continuously, or up to 1 amp intermittently.  Onboard snubber diodes allow control of inductive loads.

Power

Your QVGA Controller includes a high-efficiency switching regulator with surge suppression, transient filtering, and EMI/RFI filtering to provide clean supplies for the onboard analog and digital electronics.  You need only supply regulated or unregulated DC power in the range of 8 to 26 volts if using a monochrome display, or 15 to 26 volts if using an EL display.

Surge Suppression

The raw input is protected by a “varistor” rated at 33 Volts DC.  This metal oxide surge suppresser protects the QVGA Controller by clamping high voltage spikes before they have a chance to do any harm.  The varistor has no effect if the input voltage is less than the maximum specified, or 26 volts.  Above 33 volts the device starts to conduct current, and it acts like a short circuit to high voltages, thus clamping the voltage spikes.  To prevent this varistor from consuming current, you should make sure that the maximum DC voltage supplied is always less than 26 volts.

EMI/RFI Filter

Additional protection is provided by an electro-magnetic interference (EMI) and radio frequency interference (RFI) filter that prevents high frequency noise from invading the circuitry via the power input, and also prevents EMI from propagating back to the external power supply.  The EMI filter is implemented by a two stage PI network of inductors and capacitors. The output of the first stage filter, called  V+raw, is passed to the Wildcard module bus for supply to Wildcard modules that require their own unregulated DC power.  This unregulated voltage is free of high-frequency and high-voltage transients.  If you design custom add-on Wildcard boards, we recommend that you use V+raw as the input for local 5 Volt regulators.  It is good design practice to place local voltage regulators on each board, as this minimizes noise problems and improves modularity.

The QVGA Controller board is designed for reliable low noise operation.  It is implemented as a state of the art 6-layer surface-mount board.  Two inner layers are dedicated ground and power planes, providing low-impedance return paths for digital current spikes.

 

Parameter

Min

Typ.

Max

Units

Conditions

Input Voltage – Monochrome Display

8

 

26

Volts

 

Input Voltage – EL Display

15

 

26

Volts

 

Power Usage – Monochrome Display

 

5

6

Watts

No Wildcards

Power Usage – EL Display

 

12

20

Watts

No Wildcards

Power Usage – per Wildcard

 

0.5

 

 

Each Wildcard

Operating Conditions

 

Parameter

Min

Max

Units

Conditions

Operating Temperature Range – Electronics

0

70

°C

Industrial Temp also available
(-40 to 85°C)

Operating Temperature Range – Monochrome Display

-20

60

°C

 

Storage Temperature Range – Monochrome Display

-20

70

 

 

Temperature Range – EL Display

-25

65

°C

 

Humidity

0

95

% Relative Humidity

At 0 to 45°C, no condensation

Humidity

0

85

% Relative Humidity

At 50°C, limited by the monochrome display.  At other temperatures the absolute humidity must be less than that provided by 85% RH at 50°C, or 100% at 47°C.

Memory

 

Parameter

Standard

With Option

Units

Flash

384

768

KBytes

RAM

257

641

KBytes

EEPROM

512

 

Bytes

Battery-Backed RAM

128

 

KBytes

Battery-Backed Real-Time Clock

 

 

 

Compact Flash Wildcard

 

64-256

MBytes

CPU I/O (CPU Ports A, D, E)

 

Parameter

Min

Max

Units

Conditions

I/O Voltage Range

-0.1

5.3

Volts

 

Input Low Voltage

 

1.0

Volts

0.2 x VDD

Input High Voltage

3.5

 

Volts

0.7 x VDD

Input Leakage Current

 

±1

mA

 

Output Low Voltage

 

0.4

Volts

at 1.6 mA

Output High Voltage

3.7

 

Volts

at –0.8 mA and VDD=4.5 V

Output Source

 

25

mA

<65 W output drive impedance, one pin at a time, observing max power dissipation limits.

Output Sink

 

25

mA

<65 W output drive impedance, one pin at a time, observing max power dissipation limits.

Note:    We recommend limiting total package power dissipation accruing from I/O current to 800 mW or less, to assure that the junction temperature remains below 125ºC.

PIA I/O (Ports PPA, PPB, PPC)

 

Parameter

Min

Max

Units

Conditions

I/O Voltage Range

-0.5

5.5

Volts

 

Input Low Voltage

 

0.8

Volts

Inputs latch high or low.  With an input high, the input pin will source up to 350 mA.  An external device must sink this current to pull the input low.  Under worst-case conditions, 2 Kohms or less to ground will always pull an input low.  Latched low, the input will sink up to 350 mA before it can be pulled high.   Under worst case conditions, 5 Kohms or less to a 5V supply will always pull the input high. PPA contains both “pull-up” and “pull-down” bus hold, PPB and PPC pull-up only.

Input High Voltage

2.0

 

Volts

Input Leakage Current

-1.0

1.0

mA

Bus Hold Current

± 50

± 350

mA

Output Low Voltage

 

0.4

Volts

at 2.5 mA

Output High Voltage

3.0
Vcc –0.4

 

Volts

IOH= –2.5 mA worst case, –20 mA typical
IOH= –100mA

Output Source

-2.5

-4

mA

±2.5 ma. guaranteed to 1.7 V through 500 ohms.  -4 ma. at VOH=3.0 V.  The max current must be limited by external circuitry.

Output Sink

2.5

4

mA

4 ma. at VOL=0.4 V.  The max current must be limited by external circuitry.

Power Dissipation

 

1

W

 

Note: We find that these pins easily provide up to ±20 ma. at their VOH and VOL.  The 4 ma. in the data sheet may be based on a max package power dissipation assuming that all 24 outputs are driven simultaneously.

8-Bit Digital to Analog Conversion

 

Parameter

Min

Typical

Max

Units

Conditions

Number of Output Channels

 

8

 

 

 

Update Rate

 

 

25,000

Samples per second

 

Full-Scale Output Range

0

 

3

Volts

 

Settling Time

 

3.5

 

ms

 

Slew Rate

 

4

 

Volts / ms

 

Integral Nonlinearity

 

0.5

 

LSB

 

Differential Nonlinearity

 

 

1

LSB

 

Load Drive Capability

 

 

1

kW

In parallel with 20pF

8-bit Analog To Digital Conversion

 

Parameter

Min

Typical

Max

Units

Conditions

Number of Input Channels

 

8

 

 

 

Sampling Frequency

 

 

100,000

Samples per second

 

Input Voltage Range

-0.1

0.0 to 5.0

5.1

Volts

 

Nonlinearity

 

 

1

LSB

 

Absolute Accuracy

 

 

2

LSB

 

12-bit Analog To Digital Conversion

 

Parameter

Min

Typical

Max

Units

Conditions

Number of Input Channels

4

 

8

 

4 differential or 8 single ended

Sampling Frequency

 

 

30,000

Samples per second

 

Input Voltage Range

-5.3

-5.0 to 5.0

5.3

Volts

 

Nonlinearity

 

 

0.5

LSB

 

Input Noise

 

200

 

mV

 

Effective Resolution

 

11.9

 

Bits

 

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