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Table of Contents


Digital I/O Wildcard Hardware

Connecting To Mosaic Controller

Selecting the Digital I/O Wildcard Address

Current Capability of the Digital Output Lines

Protecting the Input and Output Pins

Connecting to the Field Header

Digital I/O Wildcard Software

Setting the Direction of the I/O Lines

C Code to initialize the Digital I/O Wildcard

Forth Code to initialize the Digital I/O Wildcard

Controlling the I/O Lines

C Code to control the Digital I/O Wildcard

Forth Code to control the Digital I/O Wildcard

Digital I/O Wildcard Schematics (pdf)

Digital I/O Wildcard User Guide

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This section describes the software that enables you to control the Digital I/O Wildcard. Briefly, the Wildcard is addressed by addressing specific memory locations with a page address corresponding to the Wildcard’s physical address, the direction (as inputs or outputs ) of each nibble of the I/O is configured by writing to a specific location, inputs are read by reading a memory location and outputs are written by writing to the same location.

Setting the Direction of the I/O Lines

Several bytes of memory starting at C000H are used to communicate with the Digital I/O Wildcard. The page used for the memory’s extended address corresponds to the Wildcard address. For example, to communicate with Wildcard 1 on the Wildcard Carrier Board, use the 6 byte memory block starting at address C000H on page 1.

The 20 digital I/O lines on the Digital I/O Wildcard are organized into five 4-channel groups or nibbles. The five nibbles are accessed using addresses C000H to C004H. The four digital I/O lines (digital inputs 15-19) at C004H are read-only inputs. I/O lines 0-15 are configured using a direction register at C005H. Each bit of the least significant 4-bit nibble of the direction register controls the direction of four digital I/O lines. Table 2 summarizes the organization of the digital I/O lines.

Table 2: Organization of the Digital I/O Lines

digital I/O lines

In setting the direction, a one in a bit position in C005 causes the corresponding nibble of I/O to be an output and a zero sets it as an input. The least significant bit of C005 controls the direction of the lowest four output lines (those whose values are controlled by C000), the next bit of C005 controls lines 4-7 (whose values are set by C001) and so on. The upper nibbles of C000 through C005 do nothing.

For example, for a Wildcard addressed at location 3, from the Forth terminal you could set the direction of digital lines 0 through 7 to outputs and 8 through 15 as inputs by executing,

03 C005 03 C! \ Sets bits 0 and 1 to one
 \ and bits 2 and 3 to zero at address C005 on page 03

Setting bits 0 and 1 to one configures the lower two nibbles, that is, lines 0 through 7, as outputs. And setting bits 2 and 3 to zero configures the next two nibbles, lines 8 through 15, as inputs.

The output lines would immediately assume the values provided by the contents of addresses C000 through C001 (so you might want to initialize them first!). You could send alternate output highs and lows to lines 0 through 7 by executing,

0A C000 03 C!
0A C001 03 C!

At each of the nibble locations there are separate read and write registers – you can read only from the read register and you can write only to the write register. For example, whatever the value you read from C000, the values writtten to lines 0 through 3 when the direction is set to output will be the last nibble written to C000. Also, whether the pins are configured as inputs or outputs, reading from C000 will always return the actual pin values, and not necessarily what you last wrote to C000.

On power up, all of the digital I/O lines are initialized as inputs. Initializing the direction of the digital I/O lines is similar to setting the direction of Port A or Port C. The following C and FORTH code presents an example routine to set the direction of the I/O lines on the Digital I/O Wildcard.

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